New 'serial' tech will significantly reduce the cost of memory — HBM memory, that is, the sort of RAM only AI hyperscalers can use, but hey, at least they won't go after consumer RAM, or would they?

JEDEC Solid State Technology Association SPHBM4.

• SPHBM4 cuts pin counts dramatically while preserving hyperscale-class bandwidth performance
• Organic substrates reduce packaging costs and relax routing constraints in HBM designs
• Serialization shifts complexity into signaling and base logic silicon layers

High bandwidth memory has evolved around extremely wide parallel interfaces, and that design choice has defined both performance and cost constraints.