According to DigiTimes, TSMC is accelerating orders with backend equipment suppliers as it starts an expansion plan for its chip-on-wafer-on-substrate (CoWoS) packaging capacity. The shortage of compute GPUs for artificial intelligence and high-performance computing, which Nvidia largely dominates, is mainly attributed to TSMC's limited CoWoS packaging production capabilities.
Reports suggest that TSMC has plans to increase its current CoWoS capacity from 8,000 wafers per month to 11,000 wafers per month by the end of 2023 and then to around 14,500 – 16,600 wafers by the end of 2024. Previously Nvidia was rumored to increase its CoWoS capacity to 20,000 wafers per month by the end of 2024. Remember that the information comes from unofficial sources and may be inaccurate.
