A couple of days ago, Intel, TeamGroup and ASRock came together to unveil the "HUDIMM" spec for DDR5 RAM. HUDIMM use a single 32-bit subchannel instead of populating a 64-bit wide bus with two 32-bit channels. This effectively cuts bandwidth and capacity in half but allows for cheaper DDR5 that uses less ICs per stick. Today, new testing done by HKEPC, with the help of Asus, confirms exactly that — HUDIMM will incur an almost 50% bandwidth penalty, reducing performance significantly.
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