
Earlier this year SK hynix and TSMC announced a collaboration to develop and build base dies for HBM4 memory, but refrained from revealing any official details. At the European Technology Symposium 2024 this week, TSMC said that it would build HBM4 base dies using its 12FFC+ (12nm-class) and N5 (5nm-class) process technologies, reports AnandTech. The use of such advanced nodes will enable HBM4 to offer unprecedented performance and energy efficiency.
"We are working with key HBM memory partners (Micron, Samsung, SK hynix) over advanced nodes for HBM4 full stack integration," said the Senior Director of Design and Technology Platform at TSMC. "12FFC+ cost effective base die can reach HBM for performance and N5 base die can provide even more logic with much lower power at HBM4 speeds."