TSMC is gearing up to hold an opening ceremony for its Fab 21 in Arizona sometime in December 2024, reports DigiTimes. The ceremony will mark a major milestone in the company's international expansion and the result of the CHIPS and Science Act implemented by the outgoing Biden administration. It is expected to attract high-ranking attendees and highlight its business and geopolitical significance.
This opening ceremony is rumored to be held on December 6, following the recent U.S. election, positioning it as a business and political landmark for U.S.-Taiwan relations and semiconductor strategy. The event will include President-elect Donald Trump, President Joe Biden, Arizona Governor Katie Hobbs, and TSMC founder Morris Chang. When the fab shell was completed in 2022, the ceremony was also attended by TSMC CEO C.C. Wei and leaders from Apple, AMD, and Nvidia, so it is reasonable to expect some of TSMC's biggest customers to participate in the upcoming event.
TSMC plans to invest around $65 billion in its Fab 21 campus in Arizona and build three phases for the fab. So far, the company has received $6.6 billion in direct subsidies, $5 billion in loans, and a potential 25% tax credit on investments.
TSMC's Fab 21 phase 1 is reportedly already producing chips for Apple using one of the supported process technologies: N5, N5P, N4, N4P, and N4X. Following delays, the production facility will officially start manufacturing chips for its American customers sometime in 2025, so the upcoming opening ceremony is essentially a formality.
The Fab 21 Phase 2 shell is under construction and expected to be completed shortly. TSMC's Fab 21 phase 2 will produce chips using the company's N3 or N2 process technologies (3nm-class or 2nm-class). It is projected to come online in 2027–2028, depending on market conditions and incentives provided by the U.S. government and Arizona.
Finally, Fab 21 phase 3 is expected to start production late this decade or early next. At this point, it is too early to predict the production technologies it will support, though we are likely talking about 1nm-class nodes.
