Asus shares official die shots of the Core Ultra 9 285K — In-depth annotations break down Intel's disaggregated approach

Arrow Lake 200S Die Shot.

The first official die shots of Intel's Arrow Lake-based Core Ultra 9 285K have surfaced, thanks to Tony Yu at Bilibili, Asus' manager in China. The images delve into Arrow Lake's tile or chiplet architecture, structured using Intel's advanced 3D Foveros packaging technology. We also get a clearer picture of each tile's specific layout and functionality thanks to these close-ups.

Arrow Lake features a total of six tiles; the Compute Tile, the SoC Tile, the IOE Tile, the Graphics Tile, and two Filler Tiles for structural integrity. Underneath these tiles is the active interposer, which categorizes this packaging as a 3D design. Funnily enough, Intel has opted to use TSMC for every tile apart from the Base Tile - which itself is built using an outdated 22nm process node.