- Qualcomm introduces High Bandwidth Compute (HBC) memory architecture
- It leverages a hybrid design stacking LPDDR memory in a 3D space, leveraging multiple layers to essentially replace what the current generation of High Bandwidth Memory (HBM4) does
- The move, which makes use of Qualcomm's extensive experience with LPDDR, is not only power-efficient but also offers massive amounts of bandwidth and up to 768GB of stacked memory for AI workloads
Qualcomm is reigniting its Data Center ambitions, building on its expertise as a chip designer that excels in the low-power compute segment by focusing on an entirely new architecture: High Bandwidth Compute (HPC).
