Intel Announces Agilex 7 M-Series FPGAs with R-Tile, PCIe 5.0 and CXL 2.0 Support

Agilex 7 Materials

Intel today announced its Agilex 7 M-Series family of Field-Programmable Gate Array (FPGA) products, doubling down on its revitalized 10nm SuperFin fabrication node. Citing rising market demand for FPGA solutions as co-processors for Networking, Data Center, High Performance Computing (HPC)Cloud computing and other applications, Intel promises increased flexibility (mainly due to FPGA's inherently programmable nature) and higher scaling capabilities than ever before. Intel's Agilex 7 FPGAs introduce a new chiplet as part of their heterogeneous multi-die architecture, the R-Tile, which is responsible for delivering the latest connectivity technologies - namely PCIe 5.0 and CXL support - in hardware-accelerated, hard-coded IP blocks.

Intel's Agilex 7 FPGAs are fabricated on the company's 10 nm SuperFin technology. A number of different IP blocks are laid out atop an interposer and connected through Intel's EMIB. The new R-Tile and its PCIe 5.0 and CXL 2.0 capabilities are entirely self-contained in a single chiplet. (Image credit: Intel Corporation)