‘Capture the Bug,’ an international design verification hackathon to detect bugs in designs and understand debugging is underway under the leadership of the National Institute of Electronics and Information Technology (NIELIT) with the participation of over 2,000 candidates.
The State chapter of the Institution of Electronic and Electrical Engineers- Robotics and Automation Society (IEEE RAS), and the Indian Institute of Technology (IIT) Madras are associated with the event, held under the Chips to Start-up (C2S) programme of the Union government for training engineers in very large-scale integration (VLSI) and embedded system design areas.
Event coordinators say the C2S programme aims at propelling innovation, building domestic capacities to ensure hardware sovereignty, and facilitating a semiconductor ecosystem with highly trained engineers. “Our hackathon on VLSI design verification is also supported by the Ministry of Electronics and Information technology,” they added.
